Monthly Archives: September 2014

Getting started with FPGAs…Part 2

So it has been just over a week since I started my journey into FPGAs and so far so good. As a starting point I decided I would work my way through Mike Fields ebook Introducing the Spartan 3E FPGA and VHDL which I must say is an excellent resource and I thoroughly recommend it to anybody wanting to learn about FPGAs from a hands on point of view.

For the last week or so I have spent most of my lunch breaks working my way through the course. It begins with the basics, why choose FPGAs, what development tools etc and then moves quickly onto the hands on stuff like turning on LEDs, binary operations, using signals, clock sources, simulation and much more. Coming from an embedded software background I did find adapting my mindset to a non-procedural way of thinking a bit of a challenge.

Getting to grips with VHDL is fun though, I love the that a digital circuit may be fully realized in a descriptive programming language. What is great about this whole experience though is recalling all those digital electronics fundamentals that have been relegated to the back of my mind.

Below I have posted my attempt at one of the mini projects in Mikes guide. This project implements two up counters using separate 30 bit counter modules. The counters are enabled via an external signal (one of the switches on the LogicStart board) and are clocked via the Papilios 32MHz oscillator. The upper 4 bits of each counter are connected to LEDs on the LogicStart board.

Firstly the project file “Switches_LEDs_Counter.vhd”.

 library IEEE;  
 use IEEE.STD_LOGIC_1164.ALL;  
 entity Switches_LEDs_Counter is  
   Port ( LEDs : out STD_LOGIC_VECTOR(7 downto 0);  
       Switches : in STD_LOGIC_VECTOR(1 downto 0);  
       clk : in STD_LOGIC  
 end Switches_LEDs_Counter;  
 architecture Behavioral of Switches_LEDs_Counter is  
 signal count1 : STD_LOGIC_VECTOR(29 downto 0)  := (others => '0');  
 signal count2 : STD_LOGIC_VECTOR(29 downto 0)  := (others => '0');  
 COMPONENT Counter30  
     clk : IN std_logic;  
     enable : IN std_logic;  
     count : OUT std_logic_vector(29 downto 0)  
 LEDs(3 downto 0) <= count1(27 downto 24);  
 LEDs(7 downto 4) <= count2(27 downto 24);  
 Inst_Counter30_1: Counter30 PORT MAP(  
     clk => clk,  
     enable => Switches(0),  
     count => count1  
 Inst_Counter30_2: Counter30 PORT MAP(  
     clk => clk,  
     enable => Switches(1),  
     count => count2  
 end Behavioral;  

Secondly the 30 bit counter module “Switches_LEDs_Counter_Module.vhd”.

 library IEEE;  
 use IEEE.STD_LOGIC_1164.ALL;  
 entity Counter30 is  
   Port ( clk : in STD_LOGIC;  
       enable : in STD_LOGIC;  
       count : out STD_LOGIC_VECTOR (29 downto 0));  
 end Counter30;  
 architecture Behavioral of Counter30 is  
 signal my_count : STD_LOGIC_VECTOR(29 downto 0) := (others => '0');  
 count <= my_count;  
 clk_proc: process(clk)  
     if rising_edge(clk) then  
       if enable = '1' then  
         my_count <= my_count+1;  
         my_count <= (others => '0');  
       end if;  
     end if;  
   end process;  
 end Behavioral;  

OK so its not some fancy all singing all dancing SDRAM controller but we all have to start somewhere right.


Getting started with FPGAs

Like a lot of engineers I was first exposed to FPGAs back in university. A number of years have since passed and most of the stuff I learnt I have since forgotten. At the time FPGAs were mysterious devices that cost a fortune and where insanely difficult to program. Fast forward some 10+ years and technology has moved on. These devices seem to be appearing more and more and not only in commercial products but in peoples personal endeavours as well. Development boards although still expensive when compared with those for micro controllers are coming down in price. So I decided it was high time I got myself a board and got up to speed.

Choosing a board wasn’t a simple task. Although the FPGA market appears to be dominated by two players Altera and Xilinx. Which to choose? For me it came down to the quality of the tools and support. Both offer free versions of their development tools but after reading numerous reviews, articles and blogs I had a slight leaning towards Xilinx. No particular reason I just felt their tools were a bit fresher, had less limitations and the support Xillinx provides appears to be first class.

After much deliberation I decided on the Papilio FPGA development board. The Papilio is an open source FPGA development board that comes in two flavours (technically its three). The Papilio One which contains a Spartan 3E FPGA (in 250K and 500K gate count) and the Papilio Pro which contains a Spartan 6 LX9 FPGA. Both boards are minimalistic in design.  The Papilio One in addition to the FPGA contains an on board power supply with selectable I/O voltage and two channel USB connection for JTAG and serial communications. The Papilio Pro also features an on board power supply, USB connection and an additional 64Mbit SDRAM.

Additional hardware maybe added in the form of wings. That way you can purchase wings to support the features you require and not be lumbered with things you don’t. This allows you to cut down on initial layout costs. Being open source the Papilio hardware has huge support in on-line forums.

The Paplio One 250K version is available from Gadget Factory for $37.99, the 500K version for $64.99 and the Papilio Pro is available for $84.99. Even when you take into account shipping costs and currency conversion these boards still represent excellent value for money.

Papilio One

I decided to order the Papilio One 500K version and the additional Logic Start mega wing. The Logic Start mega wing contains a 7 segment display, VGA port, mono audio jack, micro joystick, SPI ADC, 8 LEDs and 8 slide switches. Great for getting up and running and experimenting.

Just over a week later and the board arrived. Not bad considering this is coming all the way from the United States to the UK.

In the mean time I had already installed the Xilinx ISE Webpack development suite as well as downloading the “hello_word” bit file and the Papilio loader tool. The next stage was to brush up on my VHDL. I decided to start with VHDL as opposed Verilog since VHDL appears to be more popular in Europe than Verilog. Realistically a good FPGA engineer would be expected to be sufficiently competent in both VHDL and Verilog but everyone has to start somewhere.

Don’t just bin it……Supercharge it!!!

We recently had our home broadband connection upgraded to a lightning fast 152 Mbps. Which I believe is the fastest available in the UK at this time. One problem though. My trusty old TL-WR841N wireless N router only supports 10/100 Mbps on its WAN/LAN ports creating a bottle neck. I know from tests when connecting directly to the modem I can regularly achieve down streams of 140+ Mbps.

Time to upgrade to a shiny new gigabit router. With the new 802.11ac wireless standard on the horizon now seems to be the ideal time to pick up a cheap dual band wireless N router. I managed to bag a TL-WDR4300 for £49.99 from my local Maplin store. This bad boy supports simultaneous 2.4GHz @ 300Mbps and 5GHz @ 450Mbps connections. Full gigabit ports. Over 800 Mbps WAN to LAN throughput and even includes 2 USB ports for sharing printers and media devices.


Which leaves me now with one redundant router. What do with it? Sell it on EBay? Give it away? Throw it? How about super charging it!!!! I’ve been aware for a while now of a number of open source firmware’s for Linux based routers. One of the best and most widely used is DD-WRT. DD-WRT adds a whole host of features to your router that only tend to be available on high end devices. Such as VPN pass-through, advanced QoS (Quality of Service), various wireless modes and much more.

To my suprise the TL-WR841N appears on the supported devices list. Upgrading the router is a simple process. All that is required is two firmware files from the DD-WRT website. One to flash the factory firmware to DD-WRT and the second the flash the DD-WRT firmware for your router. This can all be done through the routers web based GUI.

One thing about DD-WRT that got my attention was the ability to configure it as a “Repeater Bridge” allowing you to expand your network using a second wireless router. I have computers in different rooms throughout the house some which struggle to get a good signal so adding a wireless extension would be ideal.

Further to my surprise it turns out, my new router, the TL-WDR4300 is also supported. So with that now upgraded and acting as my primary router downstairs and my old TL-WR841N router upstairs in the spare room I now have a wireless link between the two. With the range being much better than that of any USB adaptor I also have a much better signal to boot.

So for those looking to upgrade to a new router or just wanting to get more out of their existing device I can thoroughly recommend DD-WRT as an excellent alternative to the stock firmware.